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[Embeded-SCM Develop] verilog HDL FFT程序

Description: 采用的verilog HDL语言编写的FFT的程序
Platform: | Size: 142482 | Author: hj445300@163.com | Hits:

[Algorithm] jaguar2s

Description: 8-1024可变点数FFT/IFFT变换,VHDL语言设计, 仿真通过,可以很容易综合.-8-1024 points FFT/IFFT transform, VHDL design, simulation, can easily integrated.
Platform: | Size: 274432 | Author: citybus | Hits:

[VHDL-FPGA-Verilog] cf_fft_1024_16

Description: 16位1024点FFT的VHDL语言实现-16 1024-point FFT VHDL
Platform: | Size: 17408 | Author: 郭子荣 | Hits:

[VHDL-FPGA-Verilog] fft1024

Description: 1024点fft verilog hdl-1024-point fft verilog hdl
Platform: | Size: 24576 | Author: | Hits:

[Linux-Unix] fft

Description: 里面含有VHDL源程序。。。测试已通过-Contains the VHDL source code inside. . . Test has passed
Platform: | Size: 31744 | Author: 小刘 | Hits:

[Other] Verilog-PPT

Description: Verilog HDL语言的PPT教程。包括简介、逻辑概念、语法和示例。-Verilog HDL language tutorial PPT. Including profiles, the logic of concepts, syntax and examples.
Platform: | Size: 536576 | Author: 翟红光 | Hits:

[VHDL-FPGA-Verilog] fftshixian

Description: OFDM系统中FFT的Verilog HDL 语言实现。-OFDM system FFT of Verilog HDL language.
Platform: | Size: 14512128 | Author: 江金华 | Hits:

[VHDL-FPGA-Verilog] FPGA_FFT

Description: 基于FPGA的高速FFT处理器的设计与实现-FPGA-based high-speed FFT Processor Design and Implementation
Platform: | Size: 73728 | Author: 萧球水 | Hits:

[Software Engineering] Impulse_fft_hw

Description: ImpulseC Codeveloper fft code. This file implements the hardware portion of a 256 sample FFT using a radix-4 algorithm. This implementation demonstrates that results similar to hand-coded HDL can be achieved using the C language, and without using a low-level style of C code.
Platform: | Size: 4096 | Author: teomondo | Hits:

[Linux-Unix] Linux_bc

Description: 对vga接口做了详细的介绍，并且有一 ·三段式Verilog的IDE程序，但只有DMA ·电子密码锁，基于fpga实现，密码正 ·IIR、FIR、FFT各模块程序设计例程， ·基于逻辑工具的以太网开发，基于逻 ·自己写的一个测温元件（ds18b20）的 ·光纤通信中的SDH数据帧解析及提取的 ·VHDL Programming by Example（McGr ·这是CAN总线控制器的IP核，源码是由 ·FPGA设计的SDRAM控制器，有仿真代码 ·xilinx fpga 下的IDE控制器原代码, ·用verilog写的，基于查表法实现的LO ·精通verilog HDL语言编- up:in STD_LOGIC down:in STD_LOGIC run_stop:in STD_LOGIC wai_t: in std_logic_vector(2 downto 0) lift:in std_logic_vector(2 downto 0) ladd: out std_logic_vector(1 downto 0) ) end control
Platform: | Size: 18683904 | Author: liuzhou | Hits:

[VHDL-FPGA-Verilog] fft_hdl

Description: 一个 16点 FFT 用基2蝶形运算单元完成，有测试环境。-16 points FFT with a radix-2 butterfly computation unit is completed and test environment.
Platform: | Size: 21504 | Author: wei | Hits:

[VHDL-FPGA-Verilog] FFT_128_floating_point

Description: 基于Altera FPGA 的FFT128浮点运算模块(veriolg HDL+C51) (开发环境：KeilC51+Quartus7.2）-The module of 128 floating-point FFT based on Altera FPGA(veriolg HDL+C51) （Development environment：KeilC51+Quartus7.2）
Platform: | Size: 8317952 | Author: ch | Hits:

[Software Engineering] FFT64_GN_DT_1_0

Description:
Platform: | Size: 140288 | Author: 李云龙 | Hits:

[Software Engineering] fft_fpga

Description: FFT（快速傅里叶变化）蝶形算法 Verilog HDL语言-FFT Verilog HDL
Platform: | Size: 704512 | Author: 李云龙 | Hits:

[VHDL-FPGA-Verilog] fft

Description: Quartusii的FFT,使用Verilog HDL 语言的FFT-FFT based on Quartusii
Platform: | Size: 6505472 | Author: 孙兰 | Hits:

[Algorithm] 16-fft-hdl

Description: 16点fft，其中实现简单，使用的是基4的结构，控制使用状态机-based-16 FFt
Platform: | Size: 2048 | Author: 张剑锋 | Hits:

[VHDL-FPGA-Verilog] synth_fft

Description: fftprocessing can complete 256 pointsFFT.-Hardware Description Language(HDL)is an advanced electronic designmethod．After HDL was put into use，it has draw great attention and gained popularity．The design used Verilog HDL and Schematic for entry tools having good effect in the system design，Meanwhile，it adopted the core provided by Xilinx／nc. improving the design efficiency．The whole design which is implemented inXC2S600E device relied on ISE and advanced hierarchy design mind．Furthermore，it is simulated and verified．The frequency attains to 40.64MHz．this paper aims at demonstration the applying FPGA to FFT signal processing can complete 256 pointsFFT.
Platform: | Size: 56320 | Author: zzy | Hits:

[VHDL-FPGA-Verilog] 1024FFT-verilog-hdl

Description: 基于spartan 3e 的IFFT算法verilog HDL程序-Based on the verilog 3e Spartan IFFT algorithm of HDL program
Platform: | Size: 437248 | Author: caizhixiang | Hits:

[DSP program] fft

Description: fpga,fft, verilog HDL codes
Platform: | Size: 5583872 | Author: mrv | Hits:

[Other] AD多通道采集 FFT实验

Description: FFT核和AD多通道采集的Verilog HDL(Verilog HDL with FFT Core and AD Multichannel Acquisition)
Platform: | Size: 4799488 | Author: xq001 | Hits:
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